In the manufacture of semiconductor devices, it is necessary that such devices be tested at the wafer level to evaluate their functionality. The process in which die in a wafer are tested is commonly referred to as “wafer sort.” Testing and determining design flaws at the die level offers several advantages. First, it allows designers to evaluate the functionality of new devices during development. Increasing packaging costs also make wafer sorting a viable cost saver, in that reliability of each die on a wafer may be tested before incurring the higher costs of packaging. Measuring reliability also allows the performance of the production process to be evaluated and production consistency rated, such as for example by “bin switching” whereby the performance of a wafer is downgraded because that wafer's performance did not meet the expected criteria.
Generally, two tests are conducted on devices at the wafer level. The first test is conducted to determine if the individual devices on the wafer are functional. A second test is conducted to determine a performance parameter for the good devices on the wafer. For example, currently wafers have hundreds to thousands of microprocessors. Each of these microprocessors is tested to determine if the microprocessor is good. The speed of the microprocessor is determined in a second test. Once measured, the speed of the microprocessor is saved and the location of the microprocessor on the wafer is noted. This information is used to sort the microprocessors based on performance at the time the wafer is sliced and diced to form individual dies, each of which has a microprocessor thereon.
Each device formed on a wafer has a number of electrical contacts. For example, testing an individual microprocessor commonly requires hundreds to thousands of different individual contacts to be made to the microprocessor on the wafer. Testing each contact requires more than merely touching each electrical contact. An amount of force must be applied to a contact to break through any oxide layer that may have been formed on the surface of the contact. Forming 3000 contacts, which are not all at the same height and not all in the same plane, is also difficult. As a result, a force has to be applied to the contacts to assure good electrical contact and to compensate for the lack of planarity among the contacts.
A membrane probe card is currently used to conduct high frequency sort and test procedures. The membrane probe card includes a rigid substrate and a large number of electrical probes. Probe card substrates have for example 500 to 7,000 probes or more depending, for example, on the microprocessor testing requirements. The probes include an attached end and a free end to contact individual electrical contacts on a device. Repair of a probe card substrate, such as when a probe is deformed (e.g., recessed) is generally work that has to be done by hand. For example, sort probe repair is currently carried out an operator physically accessing a damaged probe via a pair of tweezers, and mechanically manipulating the probe to place it at a desired location. Often, the operator will pull the probe a significant distance past the spacing between the probes during the repair process, causing the probe to bump and deform neighboring probes. As a result, otherwise fine probes are damaged and/or pushed out of original positions.